NMIMS - Navi Mumbai | MBA, BBA, MBA Tech, BA LLB, BBA LLB

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Dr. Toral Shah

Dr. Toral Shah

Assistant Professor

School of Technology Management & Engineering

PhD (Electrical Engineering- VLSI Testing) IIT Bombay, M.E. (Electronics) SPCE, Mumbai, B.E. (Electronics) SPCE, Mumbai

Email ID: toral.shah@nmims.edu

Courses taken:

Discrete Mathematics, Computer Organisation and Architecture, Python Programming, UNIX Programming, Microprocessors and Microcontrollers, Technical Paper Reading, and Writing Skills

Certifications:

 P.G. Diploma in VLSI Design

 CDAC (Pune, India)

  2001

 Adult Education

 George Brown College (Toronto,   Canada)

  2011

 Special Personality   Development Course-II

 Specialisation: Counselling

 Nrityanjali Institute

  2022

 Cognitive Research and   Leadership

 Shastri Indo Canadian Institute

  2022

Reviewer

International conference on VLSI Design and Test (VDAT) 2022

IEI-BLC-FCRIT Excellence awards-2022 Edition

Teaching Experience

20 Years

Service to the University

  • Have played instrumental role in smooth conduction of Tech Programmes (B.Tech CE, B.Tech CSBS, B.Tech AI&DS) since September 2021
    • Recruiting, inducting, and managing visiting faculty
    • Implementation of policies received from Mumbai campus
    • Active participation in cross-campus coordination
    • Overview of student activities
  • Proactive participation in teaching scheme and syllabus revision
  • Conducted 2-day FDP on "LaTeX for Mathematics and Research”, January 2020
  • Conducted Online Training sessions for Inhouse Faculty Development Program on:
    • LaTeX for Report Writing
    • Python for Research

Ph.D. Thesis

 Fully Testable Circuit Synthesis for Delay and Multiple Stuck-at Faults

 Mumbai

 Indian Institute of Technology Bombay

  Jan 2013 - Aug        2018

Advisor: Prof. Virendra Singh

Research Interest

Data Science Applications, Delay testable synthesis ,Testable architectures , Design-for-Test ,Applications of scan based testing ,Hardware security

Publications

  • Journal Publication

 

  • Toral Shah, Anzhela Matrosova, Masahiro Fujita, and Virendra Singh Multiple Stuck-at Fault Testability Analysis of ROBDD Based Combinational Circuit Design

            Journal of Electronic Testing (JETTA), (Volume 34, Number 1), February 2018, Impact factor: 0.55

                http://link.springer.com/article/10.1007/s10836-018-5703-3

Conference Publications

  1. Toral Shah, Mrudula Modi,

      Benefits of Mindfulness Meditation in Academics  first International Research

      Conference on Mindfulness, IIM Bodhgaya, February 2022

  1. Toral Shah, Anzhela Matrosova, and Virendra Singh

      Test Pattern Generation to Detect Multiple Faults in ROBDD based combinational Circuits

      23rd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS) 2017, Greece

      http://ieeexplore.ieee.org/document/8046223/

  1. Toral Shah, Anzhela Matrosova, Binod Kumar, Masahiro Fujita, Virendra Singh

      Testing multiple stuck-at faults of ROBDD based combinational circuit design

      18th IEEE Latin American Test Symposium (LATS) 2017, Bogota, Colombia

       http://ieeexplore.ieee.org/document/7906753/

  1. Toral Shah, Virendra Singh, Anzhela Matrosova

       ROBDD based Path Delay Fault testable combinational circuit design

       14th IEEE East-West Design and Test Symposium (EWDTS), 2016, Yerevan, Armenia

       http://ieeexplore.ieee.org/document/7807682/

  1. Toral Shah, Anzhela Matrosova, Virendra Singh

       BDD based PDF testable combinational circuit design

       14th IEEE Workshop on RTL and High-Level Testing (WRTLT) 2015, Mumbai, India

  1. ToralShah, Anzhela Matrosova, Virendra Singh

       PDF testability of a combinational circuit derived by covering ROBDD nodes using Invert-And-Or circuits

       8th VLSI Design and Test (VDAT) 2015, Ahmedabad, India

       http://ieeexplore.ieee.org/document/7208130/

  1. Anzhela Matrosova, E. Mitrofanov, Toral Shah

       Simplification of Fully Delay Testable Combinational circuits

       21st IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS) 2015, Halkidiki, Greece

       http://ieeexplore.ieee.org/document/7229829/

  1. Anzhela Matrosova, E.Mitrofanov, Toral Shah

       Multiple Stuck-at Fault Testability of a Combinational Circuit Derived by Covering ROBDD Nodes by Invert-And-Or Sub-circuits

       13th IEEE East-West Design and Test Symposium (EWDTS) 2015, Batumi, Georgia

       http://ieeexplore.ieee.org/document/7493099/

  1. Prashant Singh, Toral Shah, Virendra Singh

       An Improved Single-Input-Change (SIC) Based Built-In-Self-Test for Delay Testing

      13th IEEE Workshop on RTL and High-Level Testing (WRTLT) 2014, Hangzhou, China

  1. Toral Shah, Mrudula Modi

      Spirituality as Science: Experience is Proof

      8th All India Students Conference on Science and Spiritual Quest (AISSQ) 2014, IIT BHU, India 

      http://www.academia.edu/4908966/Spirituality_as_Science_Experience_is_Proof

           
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